Basics · 1 of 4
Hello, layout
Welcome to the tour of the laylight DSL, a small language for describing chip layouts. Each page has a short explanation, a program in the editor and, next to it, the layout the program produces. The compiler runs in your browser and redraws the layout as you type.
The program in the editor is complete. It has two parts:
- a layer table,
define layer { ... }, which names the layers and gives each one its GDSII layer and datatype numbers; - a cell,
cell Hello { ... }. Cells are the building blocks of a layout. This one draws on the layersi.
Inside layer si { ... }, two statements do the work:
shape rect with 10um, 2um as wg
place wg at (0, 0)shape defines a shape — here a rectangle 10 µm wide and 2 µm tall — and names it wg. place puts it somewhere. A rectangle is centered on its own origin, so place wg at (0, 0) centers it on the origin of the cell.
Defining a shape and placing it are separate steps on purpose: shapes are usually placed relative to each other, as the next chapter shows.
Lines starting with # are comments.
Exercise
Turn the rectangle into a waveguide 20 µm long and 500 nm wide, still centered on the origin. When the layout looks right, press Submit (or Ctrl + Enter) to check it. Target, above the preview, shows the layout the exercise expects.
About the tour itself: your code and your progress are saved in this browser. Reset brings back the starting code, and Hint reveals hints one at a time. Move between pages with the arrows at the top or with Page Up and Page Down; Contents lists all pages.